diff options
| author | Christian Cunningham <cc@localhost> | 2021-12-04 17:09:22 -0700 |
|---|---|---|
| committer | Christian Cunningham <cc@localhost> | 2021-12-04 17:09:22 -0700 |
| commit | 1c6cd8e1ea53275cc44b2a0ee5a8448cbc4a3f0d (patch) | |
| tree | 8ba9eed6acebbd0940898e5c46b35caed7e03792 /src/cpu | |
| parent | 0ee2aaaa26441e37ed27e6c83cf9b65202596a4e (diff) | |
Restructured project
Diffstat (limited to 'src/cpu')
| -rw-r--r-- | src/cpu/irq.c | 38 | ||||
| -rw-r--r-- | src/cpu/irq.h | 6 |
2 files changed, 44 insertions, 0 deletions
diff --git a/src/cpu/irq.c b/src/cpu/irq.c new file mode 100644 index 0000000..26883a2 --- /dev/null +++ b/src/cpu/irq.c @@ -0,0 +1,38 @@ +#include "../cpu/irq.h" +#include "../sys/core.h" +#include "../drivers/uart.a.h" +#include "../util/time.h" + +extern void disable_irq(void); +extern void enable_irq(void); + +void c_irq_handler(void) { + disable_irq(); + unsigned long source = load32(CORE0_IRQ_SOURCE); + if (source & (1 << 8)) { + if(load32(IRQ_PENDING2) & (1 << 25)) { + if(load32(UART0_MIS) & (1<<4)) { + unsigned long data = load32(UART0_DR); + if(data == 0x74) { + unsigned long timer_status; + asm volatile("mrc p15, 0, %0, c14, c3, 1" : "=r"(timer_status)); + if(timer_status == 0) { + cntfrq = read_cntfrq(); + write_cntv_tval(cntfrq); + enable_cntv(); + } else { + disable_cntv(); + } + } + uart_char((unsigned char)data); + //uart_string((char*)" c_irq_handler\n"); + enable_irq(); + return; + } + } + } else if (source & (1 << 3)) { + c_timer(); + enable_irq(); + } + return; +} diff --git a/src/cpu/irq.h b/src/cpu/irq.h new file mode 100644 index 0000000..f0a2656 --- /dev/null +++ b/src/cpu/irq.h @@ -0,0 +1,6 @@ +#ifndef IRQ_H +#define IRQ_H + +void c_irq_handler(void); + +#endif |