diff options
author | Christian Cunningham <cc@localhost> | 2022-03-22 16:32:38 -0700 |
---|---|---|
committer | Christian Cunningham <cc@localhost> | 2022-03-22 16:32:38 -0700 |
commit | 2612bc83c57d3bc36d6042db14d898324c0091ff (patch) | |
tree | ff32e3a76b13f7f66ba20461c8ce076108678e61 /src/sys | |
parent | 24f8a2e4e887f50667b82798daa13bd55fb886b4 (diff) |
Schedule upon task addition
Disable local timer
Added CPSR Test
Diffstat (limited to 'src/sys')
-rw-r--r-- | src/sys/core.c | 16 | ||||
-rw-r--r-- | src/sys/kernel.S | 2 |
2 files changed, 9 insertions, 9 deletions
diff --git a/src/sys/core.c b/src/sys/core.c index 9099a82..ef8d4b7 100644 --- a/src/sys/core.c +++ b/src/sys/core.c @@ -32,14 +32,14 @@ void sysinit(void) // Enable UART GPU IRQ store32(1<<25, IRQ_ENABLE2); // Enable Timer - // Get the frequency - cntfrq = read_cntfrq(); - // Clear cntv interrupt and set next 1 second timer - write_cntv_tval(cntfrq/100); - // Route timer to core0 fiq - routing_core0cntv_to_core0fiq(); - // Enable timer - enablecntv(); + //// Get the frequency + //cntfrq = read_cntfrq(); + //// Clear cntv interrupt and set next 1 second timer + //write_cntv_tval(cntfrq/100); + //// Route timer to core0 fiq + //routing_core0cntv_to_core0fiq(); + //// Enable timer + //enablecntv(); // Enable system timer store32(SYS_TIMER_SC_M0, IRQ_ENABLE1); diff --git a/src/sys/kernel.S b/src/sys/kernel.S index 9184c76..8793d84 100644 --- a/src/sys/kernel.S +++ b/src/sys/kernel.S @@ -14,7 +14,7 @@ kernel_main: // Intentional undefined instruction // .word 0xf7f0a000 - cpsie aif, #0x10 + cpsie ai, #0x10 svc #2 // Start scheduling! 2: wfe |