diff options
author | Christian Cunningham <cc@localhost> | 2022-02-04 16:33:19 -0700 |
---|---|---|
committer | Christian Cunningham <cc@localhost> | 2022-02-04 16:33:19 -0700 |
commit | 6e7f93d6a09865937dde1124a6c3f36eebcd9d82 (patch) | |
tree | 085d3b687b4c6175592a4d3cf9b0afdf75503837 /src | |
parent | aaf7667a36a0268de87f1913fd9a87e1cbf7da92 (diff) |
Move tests to own file
Diffstat (limited to 'src')
-rw-r--r-- | src/boot.S | 79 | ||||
-rw-r--r-- | src/cpu/irq.c | 63 | ||||
-rw-r--r-- | src/drivers/uart.c | 2 | ||||
-rw-r--r-- | src/sys/core.c | 21 | ||||
-rw-r--r-- | src/tests/test.c | 17 | ||||
-rw-r--r-- | src/util/status.c | 2 | ||||
-rw-r--r-- | src/util/time.c | 2 |
7 files changed, 24 insertions, 162 deletions
@@ -22,22 +22,16 @@ reset: mcr p15, 0, r0, c12, c0, 0 cps #0x12 // Setup sp in IRQ mode. - mov sp,#0x4000 ldr sp, =core0_irq_stack cps #0x11 // Setup sp in FIQ mode. - mov sp,#0x2000 ldr sp, =core0_fiq_stack cps #0x1B // Setup sp in UNDEF mode. - mov sp,#0x1000 ldr sp, =core0_undefined_stack cps #0x17 // Setup sp in ABORT mode. - mov sp,#0x0800 ldr sp, =core0_data_stack cps #0x1f // Setup sp in USR/SYS mode. - mov sp,#0x6000 ldr sp, =core0_sys_stack cps #0x13 // Setup sp in SVC mode. - mov sp, #0x8000 ldr sp, =core0_svc_stack // Clear out bss. @@ -67,124 +61,51 @@ reset: ldr r5, =core3_mbox str r4, [r5] - // Output Message and Signal Next Core to Continue - ldr r0, =core0_msg - bl uart_string - ldr r5, =core1_mbox - mov r4, #1 - str r4, [r5] - ldr r5, =core0_mbox -1: ldr r4, [r5] - cmp r4, #0 - beq 1b - mov r4, #0 - str r4, [r5] - // Call kernel_main ldr r3, =kernel_main blx r3 core1run: cps #0x12 // Setup sp in IRQ mode. - mov sp,#0x4000 ldr sp, =core1_irq_stack cps #0x11 // Setup sp in FIQ mode. - mov sp,#0x2000 ldr sp, =core1_fiq_stack cps #0x1B // Setup sp in UNDEF mode. - mov sp,#0x1000 ldr sp, =core1_undefined_stack cps #0x17 // Setup sp in ABORT mode. - mov sp,#0x0800 ldr sp, =core1_data_stack cps #0x1f // Setup sp in USR/SYS mode. - mov sp,#0x6000 ldr sp, =core1_sys_stack cps #0x13 // Setup sp in SVC mode. - mov sp, #0x8000 ldr sp, =core1_svc_stack - - // Output Message and Signal Next Core to Continue - ldr r5, =core1_mbox -1: - ldr r4, [r5] - cmp r4, #0 - beq 1b - mov r4, #0 - str r4, [r5] - ldr r0, =core1_msg - bl uart_string - ldr r5, =core2_mbox - mov r4, #1 - str r4, [r5] b io_halt core2run: cps #0x12 // Setup sp in IRQ mode. - mov sp,#0x4000 ldr sp, =core2_irq_stack cps #0x11 // Setup sp in FIQ mode. - mov sp,#0x2000 ldr sp, =core2_fiq_stack cps #0x1B // Setup sp in UNDEF mode. - mov sp,#0x1000 ldr sp, =core2_undefined_stack cps #0x17 // Setup sp in ABORT mode. - mov sp,#0x0800 ldr sp, =core2_data_stack cps #0x1f // Setup sp in USR/SYS mode. - mov sp,#0x6000 ldr sp, =core2_sys_stack cps #0x13 // Setup sp in SVC mode. - mov sp, #0x8000 ldr sp, =core2_svc_stack - - // Output Message and Signal Next Core to Continue - ldr r5, =core2_mbox -1: - ldr r4, [r5] - cmp r4, #0 - beq 1b - mov r4, #0 - str r4, [r5] - ldr r0, =core2_msg - bl uart_string - ldr r5, =core3_mbox - mov r4, #1 - str r4, [r5] b io_halt core3run: cps #0x12 // Setup sp in IRQ mode. - mov sp,#0x4000 ldr sp, =core3_irq_stack cps #0x11 // Setup sp in FIQ mode. - mov sp,#0x2000 ldr sp, =core3_fiq_stack cps #0x1B // Setup sp in UNDEF mode. - mov sp,#0x1000 ldr sp, =core3_undefined_stack cps #0x17 // Setup sp in ABORT mode. - mov sp,#0x0800 ldr sp, =core3_data_stack cps #0x1f // Setup sp in USR/SYS mode. - mov sp,#0x6000 ldr sp, =core3_sys_stack cps #0x13 // Setup sp in SVC mode. - mov sp, #0x8000 ldr sp, =core3_svc_stack - - // Output Message and Signal Next Core to Continue - ldr r5, =core3_mbox -1: - ldr r4, [r5] - cmp r4, #0 - beq 1b - mov r4, #0 - str r4, [r5] - ldr r0, =core3_msg - bl uart_string - ldr r5, =core0_mbox - mov r4, #1 - str r4, [r5] b io_halt .globl io_halt io_halt: diff --git a/src/cpu/irq.c b/src/cpu/irq.c index 15603b9..ac08c05 100644 --- a/src/cpu/irq.c +++ b/src/cpu/irq.c @@ -7,12 +7,10 @@ #include <sys/core.h> #include <sys/schedule.h> #include <sys/timer.h> +#include <tests/test.h> #include <util/mutex.h> -#include <util/status.h> #include <util/time.h> -void utime(void); -void testfxn(void); void handle_data(unsigned char); void c_irq_handler(void) @@ -52,9 +50,6 @@ void c_irq_handler(void) } g_Drawer.x = x; g_Drawer.y = y; - // Ctrl+R to reset - } else if(data == 0x12) { - _start(); } else { add_thread(handle_data, (void*)data, 1); } @@ -84,9 +79,6 @@ unsigned long c_fiq_handler(void) if (counter % 0x6000 == 0) { counter = 0; } - if (counter % 0x8 == 0) { - add_thread(uart_flush, 0, 5); - } if (counter % 0x30 == 0) { return 1; } @@ -108,13 +100,9 @@ void handle_data(unsigned char data) } else if (data == 0x72) { release_mutex(&exe_cnt_m, SYS_PID); } else if (data == 0x61) { - add_thread(testfxn, 0, 3); - } else if (data == 0x62) { add_thread(uart_scheduler, 0, 2); - } else if (data == 0x63) { + } else if (data == 0x62) { add_thread(heap_info, 0, 2); - } else if (data == 0x64) { - add_thread(utime, 0, 2); } else { } g_Drawer.x = 0; @@ -125,50 +113,3 @@ void handle_data(unsigned char data) g_Drawer.y = 7; write_string(&g_Drawer, "> "); } - -void utime(void) -{ - unsigned long thi, tlo; - unsigned long long t = get_sys_time(); - thi = t >> 32; - tlo = t; - uart_hex(thi); - uart_hexn(tlo); -} - -void testfxn2(void) -{ - uart_string("Ran testfxn2\n"); -} - -void testfxn(void) -{ - unsigned long long ti = get_sys_time(); - unsigned int i = 0xDEADBEEF; - void* a = malloc(5); - void* b = malloc(3); - void* c = malloc(4); - void* d = malloc(4); - uart_string("Start\n"); - add_thread(testfxn2, 0, 0); - sys0(SYS_YIELD); - uart_string("Freeing B\n"); - free(b); - uart_string("Freeing A\n"); - free(a); - uart_string("Freeing C\n"); - free(c); - delay(0x20000000); - uart_string("Freeing D\n"); - free(d); - delay(0x20000000); - uart_hexn(i); - uart_string("End\n"); - unsigned long long tf = get_sys_time(); - unsigned long long dt = tf-ti; - unsigned long thi, tlo; - thi = dt >> 32; - tlo = dt; - uart_hex(thi); - uart_hexn(tlo); -} diff --git a/src/drivers/uart.c b/src/drivers/uart.c index c5514ce..cc9c357 100644 --- a/src/drivers/uart.c +++ b/src/drivers/uart.c @@ -1,4 +1,5 @@ #include <drivers/uart.h> +#include <sys/schedule.h> #define UART_BUFFER_SIZE 0x100 struct UartBuffer { @@ -27,6 +28,7 @@ void* uart_print(char* s) ubuffer.woffset %= UART_BUFFER_SIZE; ptr += 1; } + add_thread(uart_flush, 0, 5); return 0; } diff --git a/src/sys/core.c b/src/sys/core.c index d761336..adfbd20 100644 --- a/src/sys/core.c +++ b/src/sys/core.c @@ -12,12 +12,8 @@ #include <sys/schedule.h> #include <sys/timer.h> #include <util/mutex.h> -#include <util/status.h> #include <util/time.h> -void testlocal(void); -void testnew(void); - // Initialize IRQs void sysinit(void) { @@ -60,21 +56,4 @@ void sysinit(void) // Start Scheduler init_scheduler(); - - add_thread(testlocal, 0, 0); - add_thread(testlocal, 0, 1); - add_thread(testlocal, 0, 1); - add_thread(testlocal, 0, 3); - add_thread(testlocal, 0, 5); - add_thread(testnew, 0, 4); -} - -void testlocal(void) -{ -} - -void testnew(void) -{ - add_thread(testlocal, 0, 0); - sys0(SYS_SCHED); } diff --git a/src/tests/test.c b/src/tests/test.c new file mode 100644 index 0000000..247465e --- /dev/null +++ b/src/tests/test.c @@ -0,0 +1,17 @@ +#include <cpu.h> +#include <drivers/uart.h> + +void utime(void); + +void test_entry(void) +{ +} + +void utime(void) +{ + unsigned long long ti, tf, dt; + sys0_64(SYS_TIME, &ti); + sys0_64(SYS_TIME, &tf); + dt = tf - ti; + PRINT64(dt); +} diff --git a/src/util/status.c b/src/util/status.c index 155f016..4959431 100644 --- a/src/util/status.c +++ b/src/util/status.c @@ -73,7 +73,7 @@ void status(void) } */ // Commands - write_string(&g_Drawer, "\nMonitor: Ctrl-A m Exit: Ctrl-A x Timer: Ctrl-T Restart: Ctrl-R"); + write_string(&g_Drawer, "\nMonitor: Ctrl-A m Exit: Ctrl-A x Timer: Ctrl-T"); // GPU IRQ Statuses write_string(&g_Drawer, "\n"); diff --git a/src/util/time.c b/src/util/time.c index e9e5716..0ae3ccf 100644 --- a/src/util/time.c +++ b/src/util/time.c @@ -1,6 +1,8 @@ #include <symbols.h> #include <sys/core.h> +// CCNT - Cycle Timer (Close to ns resolution) + void routing_core0cntv_to_core0fiq(void) { store32(0x80, CORE0_TIMER_IRQCNTL); |