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-rw-r--r--src/exceptions/data.S19
-rw-r--r--src/exceptions/fiq.S7
-rw-r--r--src/exceptions/irq.S1
-rw-r--r--src/exceptions/prefetch.S8
-rw-r--r--src/exceptions/svc.S12
-rw-r--r--src/exceptions/undefined.S16
6 files changed, 35 insertions, 28 deletions
diff --git a/src/exceptions/data.S b/src/exceptions/data.S
index 656ba96..e3add71 100644
--- a/src/exceptions/data.S
+++ b/src/exceptions/data.S
@@ -9,21 +9,24 @@ data:
ldr r2, =data_msg
bl draw_string
// Output return address
- mov r0, #13
- mov r1, #15
+ mov r0, #80
+ mov r1, #0
mov r2, r4
sub r2, #8
bl draw_hex32
- mov r0, #22
- mov r1, #15
+ // Output the data at the address
+ mov r0, #80
+ mov r1, #1
ldr r2, [r4, #-8]
bl draw_hex32
- mov r0, #32
- mov r1, #15
+ // Output the Program Status
+ mov r0, #80
+ mov r1, #2
mrs r2, spsr
bl draw_hex32
- mov r0, #41
- mov r1, #15
+ // Output the data-fault register
+ mov r0, #80
+ mov r1, #3
mrc p15, 0, r2, c5, c0, 0 //// https://developer.arm.com/documentation/ddi0464/d/System-Control/Register-descriptions/Data-Fault-Status-Register?lang=en
bl draw_hex32
ldmfd sp!, {r0-r12,lr}
diff --git a/src/exceptions/fiq.S b/src/exceptions/fiq.S
index f323a02..005ed76 100644
--- a/src/exceptions/fiq.S
+++ b/src/exceptions/fiq.S
@@ -6,13 +6,17 @@ fiq:
bl c_fiq_handler
cmp r0, #1
bne 1f
+ // Schedule if interrupted a thread
mrs r1, spsr
and r1, r1, #0x1f
cmp r1, #0x10
bne 1f
ldmfd sp!, {r0-r12,lr}
+ // Don't skip missed instruction upon return
sub lr, #4
push {r3}
+ // Store the instruction in a special area for
+ // future processing
ldr r3, =irqlr
str lr, [r3, #0]
pop {r3}
@@ -21,6 +25,3 @@ fiq:
1:
ldmfd sp!, {r0-r12,lr}
subs pc, lr, #4
-
-.section .data
-fiq_msg: .asciz "FIQ\n"
diff --git a/src/exceptions/irq.S b/src/exceptions/irq.S
index 025fc41..db8b4cd 100644
--- a/src/exceptions/irq.S
+++ b/src/exceptions/irq.S
@@ -3,6 +3,7 @@
irq:
cpsid aif
push {r0,r1,r2,r3,r4,r5,r6,r7,r8,r9,r10,r11,r12,lr}
+ // Run IRQ handler
bl c_irq_handler
pop {r0,r1,r2,r3,r4,r5,r6,r7,r8,r9,r10,r11,r12,lr}
subs pc, lr, #4
diff --git a/src/exceptions/prefetch.S b/src/exceptions/prefetch.S
index 1aeba10..5166d00 100644
--- a/src/exceptions/prefetch.S
+++ b/src/exceptions/prefetch.S
@@ -4,13 +4,13 @@ prefetch:
cpsid aif
stmfd sp!, {r0-r12,lr}
mov r4, lr
- mov r0, #0
- mov r1, #16
+ mov r0, #98
+ mov r1, #0
ldr r2, =prefetch_msg
bl draw_string
// Output return address
- mov r0, #17
- mov r1, #16
+ mov r0, #98
+ mov r1, #1
mov r2, r4
bl draw_hex32
ldmfd sp!, {r0-r12,lr}
diff --git a/src/exceptions/svc.S b/src/exceptions/svc.S
index 3fb534e..7c8a9cc 100644
--- a/src/exceptions/svc.S
+++ b/src/exceptions/svc.S
@@ -3,8 +3,10 @@
svc:
cpsid aif
stmfd sp!, {r0-r12,lr}
+ // Get the SVC Exception #
ldr r0, [lr, #-4]
bic r0, #0xFF000000
+ // Jump to the appropriate Call
cmp r0, #5
bgt svc_exit
beq svc_000005
@@ -18,11 +20,11 @@ svc:
beq svc_000001
cmp r0, #0
beq svc_000000
-svc_000000:
+svc_000000: // SYS_YIELD
bl yield
ldmfd sp!, {r0-r12,lr}
b schedule
-svc_000001: // Get time
+svc_000001: // SYS_TIME
mov r2, #0x3004
movt r2, #0x3F00
ldr r0, [r2, #4] // <- SYS_TIMER_CLO
@@ -50,13 +52,15 @@ svc_000004: // Lock Lock (usr_r0 = struct Lock*)
1: clrex
ldrex r2, [r0, #0]
cmp r2, #0
+ // If it is not available, wait-queue the thread
bne svc_000004_delay_mutex
+ // Otherwise lock it
strexeq r2, r1, [r0, #0]
teq r2, #0
bne 1b
dmb
b svc_exit
-svc_000004_delay_mutex:
+svc_000004_delay_mutex: // Wait-queue the current thread
// r0 = struct Lock* m
bl sched_mutex_yield
ldmfd sp!, {r0-r12,lr}
@@ -65,9 +69,11 @@ svc_000005: // Release Lock
ldr r0, [sp, #0] // struct Lock* m
mov r1, #0
dmb
+ // Unlock
str r1, [r0, #0]
dsb
sev
+ // Awake any threads waiting for this lock
bl sched_mutex_resurrect
ldmfd sp!, {r0-r12,lr}
b schedule
diff --git a/src/exceptions/undefined.S b/src/exceptions/undefined.S
index ef00735..2d4b90a 100644
--- a/src/exceptions/undefined.S
+++ b/src/exceptions/undefined.S
@@ -4,23 +4,19 @@ undefined:
cpsid aif
stmfd sp!, {r0-r12,lr}
ldr r4, [lr, #-4]
- mov r0, #0
- mov r1, #17
+ mov r0, #62
+ mov r1, #0
ldr r2, =undefined_msg
bl draw_string
- mov r0, #18
- mov r1, #17
+ mov r0, #62
+ mov r1, #1
mov r2, r4
bl draw_hex32
- mov r0, #27
- mov r1, #17
- ldr r2, =undefined_at
- bl draw_string
// Output lr
ldr r0, [sp, #0x34]
sub r2, r0, #4
- mov r0, #31
- mov r1, #17
+ mov r0, #62
+ mov r1, #2
bl draw_hex32
// Skip instruction for now
// In future,