diff options
Diffstat (limited to 'src')
-rw-r--r-- | src/boot.S | 3 | ||||
-rw-r--r-- | src/cpu/irq.c | 38 | ||||
-rw-r--r-- | src/cpu/irq.h | 6 | ||||
-rw-r--r-- | src/drivers/uart.a.h | 8 | ||||
-rw-r--r-- | src/drivers/uart.c | 22 | ||||
-rw-r--r-- | src/drivers/uart.h | 7 | ||||
-rw-r--r-- | src/sys/core.c (renamed from src/lib.c) | 54 | ||||
-rw-r--r-- | src/sys/core.h (renamed from src/lib.h) | 44 | ||||
-rw-r--r-- | src/sys/power.c | 7 | ||||
-rw-r--r-- | src/sys/power.h | 6 | ||||
-rw-r--r-- | src/util/time.c (renamed from src/time.c) | 40 | ||||
-rw-r--r-- | src/util/time.h | 14 |
12 files changed, 172 insertions, 77 deletions
@@ -55,7 +55,8 @@ reset: irq: push {r0,r1,r2,r3,r4,r5,r6,r7,r8,r9,r10,r11,r12,lr} - bl a_irq_handler + //bl a_irq_handler + bl c_irq_handler pop {r0,r1,r2,r3,r4,r5,r6,r7,r8,r9,r10,r11,r12,lr} subs pc, lr, #4 diff --git a/src/cpu/irq.c b/src/cpu/irq.c new file mode 100644 index 0000000..26883a2 --- /dev/null +++ b/src/cpu/irq.c @@ -0,0 +1,38 @@ +#include "../cpu/irq.h" +#include "../sys/core.h" +#include "../drivers/uart.a.h" +#include "../util/time.h" + +extern void disable_irq(void); +extern void enable_irq(void); + +void c_irq_handler(void) { + disable_irq(); + unsigned long source = load32(CORE0_IRQ_SOURCE); + if (source & (1 << 8)) { + if(load32(IRQ_PENDING2) & (1 << 25)) { + if(load32(UART0_MIS) & (1<<4)) { + unsigned long data = load32(UART0_DR); + if(data == 0x74) { + unsigned long timer_status; + asm volatile("mrc p15, 0, %0, c14, c3, 1" : "=r"(timer_status)); + if(timer_status == 0) { + cntfrq = read_cntfrq(); + write_cntv_tval(cntfrq); + enable_cntv(); + } else { + disable_cntv(); + } + } + uart_char((unsigned char)data); + //uart_string((char*)" c_irq_handler\n"); + enable_irq(); + return; + } + } + } else if (source & (1 << 3)) { + c_timer(); + enable_irq(); + } + return; +} diff --git a/src/cpu/irq.h b/src/cpu/irq.h new file mode 100644 index 0000000..f0a2656 --- /dev/null +++ b/src/cpu/irq.h @@ -0,0 +1,6 @@ +#ifndef IRQ_H +#define IRQ_H + +void c_irq_handler(void); + +#endif diff --git a/src/drivers/uart.a.h b/src/drivers/uart.a.h new file mode 100644 index 0000000..d4bf199 --- /dev/null +++ b/src/drivers/uart.a.h @@ -0,0 +1,8 @@ +#ifndef UART_AH +#define UART_AH + +extern void uart_char(unsigned char c); +extern void uart_hex(unsigned long data); +extern void uart_string(char* message); + +#endif diff --git a/src/drivers/uart.c b/src/drivers/uart.c new file mode 100644 index 0000000..f7f15c2 --- /dev/null +++ b/src/drivers/uart.c @@ -0,0 +1,22 @@ +#include "uart.a.h" + +void uart_hexn(unsigned long c_val) { + uart_hex(c_val); + uart_char(0x0a); +} + +void uart_10(unsigned long val) { + unsigned long t = val; + unsigned long c; + char buffer[11] = "0000000000\0"; + char* dptr = buffer + 9; + for(int i = 0; i <= 10; i++) { + c = t%10; + *dptr = 0x30 + (c&0xF); + t /= 10; + if (t==0) + break; + dptr -= 1; + } + uart_string(dptr); +} diff --git a/src/drivers/uart.h b/src/drivers/uart.h new file mode 100644 index 0000000..c78398b --- /dev/null +++ b/src/drivers/uart.h @@ -0,0 +1,7 @@ +#ifndef UART_H +#define UART_H + +void uart_hexn(unsigned long); +void uart_10(unsigned long); + +#endif diff --git a/src/lib.c b/src/sys/core.c index d21009b..0420df0 100644 --- a/src/lib.c +++ b/src/sys/core.c @@ -1,18 +1,8 @@ -#include "lib.h" - -extern void uart_char(unsigned char c); -extern void uart_hex(unsigned long data); -extern void uart_string(char* message); - -extern unsigned long read_cntv_tval(); -extern unsigned long read_cntfrq(); -extern void write_cntv_tval(unsigned long); // Clear cntv interrupt and set next 1 second timer -extern void routing_core0cntv_to_core0irq(); -extern void enable_cntv(); - -void uart_10(unsigned long); - -extern unsigned long cntfrq; +#include "../drivers/uart.a.h" +#include "../drivers/uart.h" +#include "../util/time.h" +#include "../sys/core.h" +#include "../sys/power.h" static char* os_info_h = "\033[93mInitialized the Real Time Operating System\033[0m\n\033[96mName\033[0m: \033[94mDendritOS\033[0m\n\033[96mVersion\033[0m: \033[95m"; static char* os_info_t = "\033[0m\n\nQEMU\n====\n Exit : Ctrl-A x\n Monitor : Ctrl-A c\n\n"; @@ -25,24 +15,6 @@ static char* os_info_v = VERSION; static char* irq_on = " \033[92mEnabled\033[0m\n"; static char* irq_off = " \033[91mDisabled\033[0m\n"; -static inline unsigned long load32(unsigned long addr) { - return *(volatile unsigned long*)addr; -} - -static inline void store32(unsigned long value, unsigned long addr) { - *(volatile unsigned long*)addr = value; -} - -static inline void delay(unsigned long cycles) { - asm volatile("__delay_%=: subs %[cycles], %[cycles], #1;bne __delay_%=\n" - : "=r"(cycles): [cycles]"0"(cycles) : "cc"); -} - -void uart_hexn(unsigned long c_val) { - uart_hex(c_val); - uart_char(0x0a); -} - // Initialize IRQs void sysinit() { // Mask Overrun of UART0 @@ -150,19 +122,3 @@ void postinit() { uart_string(os_info_v); uart_string(os_info_t); } - -void uart_10(unsigned long val) { - unsigned long t = val; - unsigned long c; - char buffer[11] = "0000000000\0"; - char* dptr = buffer + 9; - for(int i = 0; i <= 10; i++) { - c = t%10; - *dptr = 0x30 + (c&0xF); - t /= 10; - if (t==0) - break; - dptr -= 1; - } - uart_string(dptr); -} diff --git a/src/lib.h b/src/sys/core.h index 936a582..d2b4c1b 100644 --- a/src/lib.h +++ b/src/sys/core.h @@ -1,3 +1,21 @@ +#ifndef CORE_H +#define CORE_H + +extern unsigned long cntfrq; + +static inline unsigned long load32(unsigned long addr) { + return *(volatile unsigned long*)addr; +} + +static inline void store32(unsigned long value, unsigned long addr) { + *(volatile unsigned long*)addr = value; +} + +static inline void delay(unsigned long cycles) { + asm volatile("__delay_%=: subs %[cycles], %[cycles], #1;bne __delay_%=\n" + : "=r"(cycles): [cycles]"0"(cycles) : "cc"); +} + enum { // The offset for the MMIO area @@ -75,5 +93,29 @@ enum MBOX_STATUS = (MBOX_BASE + 0x18), MBOX_WRITE = (MBOX_BASE + 0x20), - GPU_INTERRUPTS_ROUTING = 0x4000000C + GPU_INTERRUPTS_ROUTING = 0x4000000C, + + CORE0_TIMER_IRQCNTL = 0x40000040, + CORE0_IRQ_SOURCE = 0x40000060, + + /* Power Management, Reset controller and Watchdog registers */ + //BCM2835_PERI_BASE = 0x3F000000, + BCM2835_PERI_BASE = 0x20000000, + PM_BASE = (BCM2835_PERI_BASE + 0x100000), + PM_RSTC = (PM_BASE+0x1c), + PM_WDOG = (PM_BASE+0x24), + PM_WDOG_RESET = 0x00000000, + PM_PASSWORD = 0x5a000000, + PM_WDOG_TIME_SET = 0x000fffff, + PM_RSTC_WRCFG_CLR = 0xffffffcf, + PM_RSTC_WRCFG_SET = 0x00000030, + PM_RSTC_WRCFG_FULL_RESET = 0x00000020, + PM_RSTC_RESET = 0x00000102 }; + +void sysinit(); +void c_timer(); +void chk_irq_stat(); +void postinit(); + +#endif diff --git a/src/sys/power.c b/src/sys/power.c new file mode 100644 index 0000000..4abee01 --- /dev/null +++ b/src/sys/power.c @@ -0,0 +1,7 @@ +#include "../sys/core.h" +#include "../sys/power.h" + +void reboot(void) { + store32(PM_WDOG, PM_PASSWORD | 1); + store32(PM_RSTC, PM_PASSWORD | PM_RSTC_WRCFG_FULL_RESET); +} diff --git a/src/sys/power.h b/src/sys/power.h new file mode 100644 index 0000000..711842b --- /dev/null +++ b/src/sys/power.h @@ -0,0 +1,6 @@ +#ifndef SYS_POWER_H +#define SYS_POWER_H + +void reboot(void); + +#endif diff --git a/src/time.c b/src/util/time.c index d637612..72fc52b 100644 --- a/src/time.c +++ b/src/util/time.c @@ -1,16 +1,4 @@ -static inline unsigned long load32(unsigned long addr) { - return *(volatile unsigned long*)addr; -} - -static inline void store32(unsigned long value, unsigned long addr) { - *(volatile unsigned long*)addr = value; -} - -#define uint64_t unsigned long long -#define uint32_t unsigned long - -#define CORE0_TIMER_IRQCNTL 0x40000040 -#define CORE0_IRQ_SOURCE 0x40000060 +#include "../sys/core.h" void routing_core0cntv_to_core0irq(void) { @@ -20,57 +8,57 @@ void routing_core0cntv_to_core0irq(void) //store32(0x80, CORE0_TIMER_IRQCNTL); } -uint32_t read_core0timer_pending(void) +unsigned long read_core0timer_pending(void) { - uint32_t tmp; + unsigned long tmp; tmp = load32(CORE0_IRQ_SOURCE); return tmp; } void enable_cntv(void) { - uint32_t cntv_ctl; + unsigned long cntv_ctl; cntv_ctl = 1; asm volatile ("mcr p15, 0, %0, c14, c3, 1" :: "r"(cntv_ctl) ); // write CNTV_CTL } void disable_cntv(void) { - uint32_t cntv_ctl; + unsigned long cntv_ctl; cntv_ctl = 0; asm volatile ("mcr p15, 0, %0, c14, c3, 1" :: "r"(cntv_ctl) ); // write CNTV_CTL } -uint64_t read_cntvct(void) +unsigned long long read_cntvct(void) { - uint64_t val; + unsigned long long val; asm volatile("mrrc p15, 1, %Q0, %R0, c14" : "=r" (val)); return (val); } -uint64_t read_cntvoff(void) +unsigned long long read_cntvoff(void) { - uint64_t val; + unsigned long long val; asm volatile("mrrc p15, 4, %Q0, %R0, c14" : "=r" (val)); return (val); } -uint32_t read_cntv_tval(void) +unsigned long read_cntv_tval(void) { - uint32_t val; + unsigned long val; asm volatile ("mrc p15, 0, %0, c14, c3, 0" : "=r"(val) ); return val; } -void write_cntv_tval(uint32_t val) +void write_cntv_tval(unsigned long val) { asm volatile ("mcr p15, 0, %0, c14, c3, 0" :: "r"(val) ); return; } -uint32_t read_cntfrq(void) +unsigned long read_cntfrq(void) { - uint32_t val; + unsigned long val; asm volatile ("mrc p15, 0, %0, c14, c0, 0" : "=r"(val) ); return val; } diff --git a/src/util/time.h b/src/util/time.h new file mode 100644 index 0000000..1fb3906 --- /dev/null +++ b/src/util/time.h @@ -0,0 +1,14 @@ +#ifndef TIME_H +#define TIME_H + +void routing_core0cntv_to_core0irq(void); +unsigned long read_core0timer_pending(void); +void enable_cntv(void); +void disable_cntv(void); +unsigned long long read_cntvct(void); +unsigned long long read_cntvoff(void); +unsigned long read_cntv_tval(void); +void write_cntv_tval(unsigned long val); +unsigned long read_cntfrq(void); + +#endif |