From 9322e7bfed9d336377d588623357b93d02312afa Mon Sep 17 00:00:00 2001
From: Christian Cunningham <cc@localhost>
Date: Fri, 25 Mar 2022 13:10:20 -0700
Subject: UART FIFO Interrupting

---
 include/symbols.h     | 6 ++++++
 kernel/drivers/uart.c | 2 ++
 2 files changed, 8 insertions(+)

diff --git a/include/symbols.h b/include/symbols.h
index 62f4a96..49db734 100644
--- a/include/symbols.h
+++ b/include/symbols.h
@@ -13,6 +13,12 @@ enum
 	// The offsets for reach register.
 	GPIO_BASE = (MMIO_BASE + 0x200000),
 
+	UART_FIFO_18 = 0,
+	UART_FIFO_14 = 1,
+	UART_FIFO_12 = 2,
+	UART_FIFO_34 = 3,
+	UART_FIFO_78 = 4,
+
 	//// The base address for UART.
 	UART0_BASE = (GPIO_BASE + 0x1000), // for raspi4 0xFE201000, raspi2 & 3 0x3F201000, and 0x20201000 for raspi1
 
diff --git a/kernel/drivers/uart.c b/kernel/drivers/uart.c
index 33f9e82..bd12486 100644
--- a/kernel/drivers/uart.c
+++ b/kernel/drivers/uart.c
@@ -37,6 +37,8 @@ void uart_init(void)
 	store32((1<<4)|(1<<5)|(1<<6), UART0_LCRH);
 	// Mask all interrupts
 	store32((1<<1)|(1<<4)|(1<<5)|(1<<6)|(1<<7)|(1<<8)|(1<<9)|(1<<10), UART0_IMSC);
+	// Interrupt when FIFO is 1/8 full
+	store32((UART_FIFO_18 << 3) | (UART_FIFO_12 << 0), UART0_IFLS);
 	// Enable UART0
 	store32((1<<0)|(1<<8)|(1<<9), UART0_CR);
 }
-- 
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