diff options
| author | Christian Cunningham <cc@localhost> | 2022-02-19 13:15:00 -0700 |
|---|---|---|
| committer | Christian Cunningham <cc@localhost> | 2022-02-19 13:15:00 -0700 |
| commit | 3003baf1d0e3432818e810cf0bec51da9b23458a (patch) | |
| tree | e81296200bd2c5babf42bcdece6f2a218e558ae0 /include | |
| parent | 1eb62e377474e639a9a685d37c52cc42b7372ccf (diff) | |
Macro to initialize cores
Diffstat (limited to 'include')
| -rw-r--r-- | include/macros.inc | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/include/macros.inc b/include/macros.inc new file mode 100644 index 0000000..9eac27a --- /dev/null +++ b/include/macros.inc @@ -0,0 +1,17 @@ +.macro init_core coreid + // set vector address. + ldr r0, =vector + mcr p15, 0, r0, c12, c0, 0 + cps #0x12 // Setup sp in IRQ mode. + ldr sp, =irq_stack_core\coreid + cps #0x11 // Setup sp in FIQ mode. + ldr sp, =fiq_stack_core\coreid + cps #0x1B // Setup sp in UNDEF mode. + ldr sp, =undefined_stack_core\coreid + cps #0x17 // Setup sp in ABORT mode. + ldr sp, =data_stack_core\coreid + cps #0x1f // Setup sp in USR/SYS mode. + ldr sp, =sys_stack_core\coreid + cps #0x13 // Setup sp in SVC mode. + ldr sp, =svc_stack_core\coreid +.endm |