diff options
| author | Christian Cunningham <cc@localhost> | 2022-02-09 22:26:43 -0700 |
|---|---|---|
| committer | Christian Cunningham <cc@localhost> | 2022-02-09 22:26:43 -0700 |
| commit | cd32aaf0510088768e4dd20ea22f92cad9f4367d (patch) | |
| tree | f1f3101d4bbfc2fa8906d87c928421a1f32a0103 /src/boot.S | |
| parent | a3ba24739c2309df5e39ad8bdcfca171b1eec5a3 (diff) | |
Add interrupt to all cores
Diffstat (limited to 'src/boot.S')
| -rw-r--r-- | src/boot.S | 10 |
1 files changed, 9 insertions, 1 deletions
@@ -20,7 +20,6 @@ reset: // set vector address. ldr r0, =vector mcr p15, 0, r0, c12, c0, 0 - cps #0x12 // Setup sp in IRQ mode. ldr sp, =core0_irq_stack cps #0x11 // Setup sp in FIQ mode. @@ -66,6 +65,9 @@ reset: blx r3 core1run: + // set vector address. + ldr r0, =vector + mcr p15, 0, r0, c12, c0, 0 cps #0x12 // Setup sp in IRQ mode. ldr sp, =core1_irq_stack cps #0x11 // Setup sp in FIQ mode. @@ -80,6 +82,9 @@ core1run: ldr sp, =core1_svc_stack b io_halt core2run: + // set vector address. + ldr r0, =vector + mcr p15, 0, r0, c12, c0, 0 cps #0x12 // Setup sp in IRQ mode. ldr sp, =core2_irq_stack cps #0x11 // Setup sp in FIQ mode. @@ -94,6 +99,9 @@ core2run: ldr sp, =core2_svc_stack b io_halt core3run: + // set vector address. + ldr r0, =vector + mcr p15, 0, r0, c12, c0, 0 cps #0x12 // Setup sp in IRQ mode. ldr sp, =core3_irq_stack cps #0x11 // Setup sp in FIQ mode. |