diff options
Diffstat (limited to 'src/sys')
| -rw-r--r-- | src/sys/core.c | 41 | ||||
| -rw-r--r-- | src/sys/core.h | 37 |
2 files changed, 74 insertions, 4 deletions
diff --git a/src/sys/core.c b/src/sys/core.c index ed88570..3f2d117 100644 --- a/src/sys/core.c +++ b/src/sys/core.c @@ -1,5 +1,6 @@ #include "../cpu/irq.h" #include "../drivers/uart.h" +#include "../drivers/usb.h" #include "../graphics/lfb.h" #include "../graphics/drawer.h" #include "../lib/mem.h" @@ -18,14 +19,44 @@ char* os_info_v = VERSION; // Initialize IRQs void sysinit() { + // Route GPU interrupts to Core 0 + store32(0x00, GPU_INTERRUPTS_ROUTING); + // Mask Overrun of UART0 store32(1<<4, UART0_IMSC); // Enable UART GPU IRQ store32(1<<25, IRQ_ENABLE2); - // Route GPU interrupts to Core 0 - store32(0x00, GPU_INTERRUPTS_ROUTING); + // Enable USB Interrupt + store32(1<<9, IRQ_ENABLE1); + // USB Host power on + // HPRT.PrtPwr = 1'b1 -> HPRT.PrtRst = 1'b1 -> wait 60msec -> HPRT.PrtRst = 1'b0 + *USB_HOST_HPRT |= 1 << 12; + *USB_HOST_HPRT |= 1 << 8; + delay(0x100000); + *USB_HOST_HPRT &= ~(1 << 8); + + // enable irq + // GAHBCFG.GlblIntrMsk = 1'b1 + // GINTMSK.ConIDStsChngMsk = 1'b1, GINTMSK.PrtIntMsk = 1'b1, GINTMSK.SofMsk = 1'b1 + *USB_CORE_GAHBCFG |= 1; + *USB_CORE_GINTMSK = 1 << 28 | 1 << 24 | 0 << 3; + + // port enable and retry detect + // HPRT.PrtPwr = 1'b1, HPRT.PrtEnChng = 1'b1, HPRT.PrtConnDet = 1'b1 + *USB_HOST_HPRT = 1 << 12 | 1 << 3 | 1 << 1; + + // enable channel irq + // HAINTMASK.HAINTMsk = 16'h3 + // HCINTMSK0.XferComplMsk = 1'b1 + *USB_HOST_HAINTMSK |= 0x3; + *USB_HOST_HCINTMSK0 |= 1; + *USB_HOST_HCINTMSK1 |= 1; + + // HCCAR1.EPDir = 1'b0 (OUT) / 1'b01(IN), HCCAR1.MPS = 11'h40 + *USB_HOST_HCCHAR0 |= 0x40; // OUT + *USB_HOST_HCCHAR1 |= 1 << 15 | 0x40; // IN // Enable Timer // As an IRQ @@ -128,4 +159,10 @@ void postinit() { } write_string(&g_Drawer, "\n> "); + + send_packet(); + for (int i = 0; i < 18; i++) { + uart_hex(usb_buffer1[i]); + uart_char('\n'); + } } diff --git a/src/sys/core.h b/src/sys/core.h index 88d4644..b76df1b 100644 --- a/src/sys/core.h +++ b/src/sys/core.h @@ -22,7 +22,7 @@ enum #ifdef BSP23 MMIO_BASE = 0x3F000000, // For Raspberry Pi 2 and 3 #else - MMIO_BASE = 0xFE000000, // For Raspberry Pi 2 and 3 + MMIO_BASE = 0xFE000000, #endif // The offsets for reach register. @@ -110,8 +110,41 @@ enum PM_RSTC_WRCFG_CLR = 0xffffffcf, PM_RSTC_WRCFG_SET = 0x00000030, PM_RSTC_WRCFG_FULL_RESET = 0x00000020, - PM_RSTC_RESET = 0x00000102 + PM_RSTC_RESET = 0x00000102, }; +#define uint32_t unsigned long +#define USB_BASE 0x3F980000 +//CORE +#define USB_CORE_GAHBCFG ((volatile uint32_t *)(0x8 + USB_BASE)) +#define USB_CORE_GINTSTS ((volatile uint32_t *)(0x14 + USB_BASE)) +#define USB_CORE_GINTMSK ((volatile uint32_t *)(0x18 + USB_BASE)) +#define USB_CORE_GUID ((volatile uint32_t *)(0x3C + USB_BASE)) +#define USB_CORE_GSNPSID ((volatile uint32_t *)(0x40 + USB_BASE)) +//HOST +#define USB_HOST_HCFG ((volatile uint32_t *)(0x400 + USB_BASE)) +#define USB_HOST_HAINTMSK ((volatile uint32_t *)(0x418 + USB_BASE)) +#define USB_HOST_HPRT ((volatile uint32_t *)(0x440 + USB_BASE)) +//CHANNEL +#define USB_HOST_HCCHAR0 ((volatile uint32_t *)(0x500 + USB_BASE)) +#define USB_HOST_HCINTMSK0 ((volatile uint32_t *)(0x50C + USB_BASE)) +#define USB_HOST_HCTSIZ0 ((volatile uint32_t *)(0x510 + USB_BASE)) +#define USB_HOST_HCDMA0 ((volatile uint32_t *)(0x514 + USB_BASE)) +#define USB_HOST_HCCHAR1 ((volatile uint32_t *)(0x520 + USB_BASE)) +#define USB_HOST_HCINTMSK1 ((volatile uint32_t *)(0x52C + USB_BASE)) +#define USB_HOST_HCTSIZ1 ((volatile uint32_t *)(0x530 + USB_BASE)) +#define USB_HOST_HCDMA1 ((volatile uint32_t *)(0x534 + USB_BASE)) + +#define uint8_t unsigned char +#define uint16_t unsigned short +#define uint32_t unsigned long + +struct UsbDeviceRequest { + uint8_t Type; + uint8_t Request; + uint16_t Value; + uint16_t Index; + uint16_t Length; +} __attribute__((__packed__)); void sysinit(); void postinit(); |