aboutsummaryrefslogtreecommitdiff
path: root/src/sys/core.c
blob: f75ec35dae04f85de9fd6aba0d09a80dafaf441f (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
#include "../cpu/irq.h"
#include "../drivers/uart.h"
#include "../graphics/drawer.h"
#include "../graphics/lfb.h"
#include "../lib/mem.h"
#include "../lib/strings.h"
#include "../sys/core.h"
#include "../sys/power.h"
#include "../sys/timer.h"
#include "../util/mutex.h"
#include "../util/time.h"

#ifndef VERSION
char* os_info_v = "?";
#else
char* os_info_v = VERSION;
#endif

// Initialize IRQs
void sysinit(void)
{
	// Route GPU interrupts to Core 0
	store32(0x00, GPU_INTERRUPTS_ROUTING);

	// Mask Overrun of UART0
	store32(1<<4, UART0_IMSC);
	// Enable UART GPU IRQ
	store32(1<<25, IRQ_ENABLE2);

	// Enable Timer
	// As an IRQ
	store32(1<<0, IRQ_BASIC_ENABLE);
	// As a  FIQ
	//store32(0xC0, FIQ_CONTROL);
	// Get the frequency
	cntfrq = read_cntfrq();
	// Clear cntv interrupt and set next 1 second timer
	write_cntv_tval(cntfrq);
	// Route timer to core0 irq
	routing_core0cntv_to_core0irq();
	// Enable timer
	enablecntv();

	// Graphics Initialize
	lfb_init();
	lfb_showpicture();

	// Enable IRQ & FIQ
	enableirq();
	enablefiq();
}

void output_irq_status(void)
{
	// Basic IRQ
	unsigned long ib_val = load32(IRQ_BASIC_ENABLE);
	// IRQ 1
	unsigned long i1_val = load32(IRQ_ENABLE1);
	// IRQ 2
	unsigned long i2_val = load32(IRQ_ENABLE2);
	// FIQ
	unsigned long f_val = load32(FIQ_CONTROL);

	// Check GPU Interrupt Routing
	unsigned long g_val = load32(GPU_INTERRUPTS_ROUTING);
	write_string(&g_Drawer, "GPU IRQ: Core ");
	write_10(&g_Drawer, g_val & 0b11);
	write_string(&g_Drawer, " | GPU FIQ: Core ");
	write_10(&g_Drawer, (g_val >> 2) & 0b11);

	write_string(&g_Drawer, "\n");
	write_hex32(&g_Drawer, ib_val);
	write_string(&g_Drawer, " ");
	write_hex32(&g_Drawer, i1_val);
	write_string(&g_Drawer, " ");
	write_hex32(&g_Drawer, i2_val);
	write_string(&g_Drawer, " ");
	write_hex32(&g_Drawer,  f_val);

	// Check UART IRQ
	write_string(&g_Drawer, "\nUART: ");
	if (i2_val & (1<<25)) {
		write_cstring(&g_Drawer, "Enabled", 0x00FF00);
	} else {
		write_cstring(&g_Drawer, "Disabled", 0xFF0000);
	}

	// Check TIMER IRQ
	write_string(&g_Drawer, "   TIMER: ");
	if (ib_val & (1<<0)) {
		write_cstring(&g_Drawer, "Enabled", 0x00FF00);
	} else {
		write_cstring(&g_Drawer, "Disabled", 0xFF0000);
	}
}

void postinit(void)
{
	// OS Info
	write_cstring(&g_Drawer, "DendritOS", 0xFF0000);
	write_cstring(&g_Drawer, " v", 0x00FFFF);
	write_cstring(&g_Drawer, os_info_v, 0x00FFFF);
	write_string(&g_Drawer, " #");
	if (lock_mutex(&exe_cnt_m, SYS_PID) == 0) {
		write_10(&g_Drawer, *(exe_cnt_m.addr));
		release_mutex(&exe_cnt_m, SYS_PID);
	}

	// Commands
	write_string(&g_Drawer, "\nMonitor: Ctrl-A m  Exit: Ctrl-A x  Timer: Ctrl-T");

	// GPU IRQ Statuses
	write_string(&g_Drawer, "\n");
	output_irq_status();

	// Timer Status
	write_string(&g_Drawer, "\nTIMER: ");
	write_cstring(&g_Drawer, "Enabled ", 0x00FF00);
	// Output the frequency
	write_string(&g_Drawer, " @ ");
	unsigned long frq = read_cntfrq()/1000;
	write_10(&g_Drawer, frq);
	write_string(&g_Drawer, " kHz");

	// Video Status
	write_string(&g_Drawer, "\nVIDEO: ");
	write_cstring(&g_Drawer, "Enabled ", 0x00FF00);
	write_10(&g_Drawer, width);
	write_string(&g_Drawer, "x");
	write_10(&g_Drawer, height);
	if(isrgb) {
		write_string(&g_Drawer, " RGB");
	} else {
		write_string(&g_Drawer, " BGR");
	}

	// Output Serial Data Recieve Line
	write_string(&g_Drawer, "\n> ");
}